1. Field of the Invention
The present invention is related to test program generation by functional exercisers, and more specifically to a test case generator generating code that self-modifies to replace an instruction during a first pass of a test case.
2. Description of Related Art
Functional exercisers that generate random test code streams for testing processor integrated circuits (ICs), and for verifying designs that should have the same machine behavior as other processors, generally include a test code generator of one of two types: reference model test code generators, or consistency-checking test code generators. Consistency-checking test code generators typically do not use a reference model and generate random code streams, including random branch directions, since the state of the machine is not known when the code stream is generated in order to control the direction of a branch. An exerciser having a consistency-checking test code generator compares the behavior of a processor in response to the generated program code to the results from other processors, to determine whether a processor is functionally sound. As an alternative, consistency-checking test code generators can use predesigned code and data sequences to control branch direction. However, the use of predesigned code and data sequences limits the flexibility of the exerciser compared to purely random branch direction generation and also increase complexity of the test code generator.
A reference model test code generator includes a model of the processor (machine model) and therefore the state of the machine is known at the time of generating a branch instruction. Therefore, the direction of the branch is known and the generated test case can be designed to more completely explore the potential machine state and execution space of the processor.
Each of the test program generation strategies described above has advantages and disadvantages. The consistency-checking technique requires stored data for comparison or multiple passes and there is no absolute control of the branch directions generated. Therefore, a larger number of test cases may be required compared to an exerciser that includes a reference model test case generator. The reference model test case generator is inherently more complex and requires processing resources to track the state of the machine throughout the progress of the generated code stream. Therefore, fewer test cases can be generated in the same amount of time, even though less test cases may be required to test the processor as fully as a given amount of randomly branching test cases.
In addition, there are other instructions besides branches that may have state dependencies that it is desirable both test exhaustively and to control to reduce the amount of test cases that must be executed. For such instructions, the same exerciser criteria, advantages and disadvantages may apply.
Therefore, it would be desirable to provide a test case generator for generating a code stream that provides greater control over the test case generation without greatly increasing complexity and overhead in the test code generation.